TL16C752D Datasheet, PDF (18/56 Pages) Texas Instruments – TL16C752D Dual UART With 64-Byte FIFO

TL16C752D
SLLSEN8B – SEPTEMBER 2015 – REVISED MARCH 2016
Feature Description (continued)
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TX
Start Byte 0–7 Stop
Start Byte 0–7 Stop
CTS
A. When CTS is low, the transmitter keeps sending serial data out.
B. When CTS goes high before the middle of the last stop bit of the current byte, the transmitter finishes sending the
current byte, but it does not send the next byte.
C. When CTS goes from high to low, the transmitter begins sending data again.
Figure 17. CTS Functional Timing
UART 1
UART 2
D7 – D0
RX
FIFO
Serial to
Parallel
RX TX
Parallel to
Serial
Flow
Control
RTS CTS
Flow
Control
TX
FIFO
TX
FIFO
Parallel to
Serial
TX RX
Serial to
Parallel
Flow
Control
CTS RTS
Flow
Control
RX
FIFO
D7 – D0
Figure 18. Autoflow Control (Auto-RTS and Auto-CTS) Example
8.3.1.5 Software Flow Control
Software flow control is enabled through the enhanced feature register and the modem control register. Different
combinations of software flow control can be enabled by setting different combinations of EFR[3−0]. Table 1
shows software flow control options.
Two other enhanced features relate to software flow control:
• Xon Any Function [MCR(5): Operation resumes after receiving any character after recognizing the Xoff
character.
• Special Character [EFR(5)]: Incoming data is compared to Xoff2. Detection of the special character sets the
Xoff interrupt [IIR(4)] but does not halt transmission. The Xoff interrupt is cleared by a read of the IIR. The
special character is transferred to the RX FIFO.
NOTE
It is possible for an Xon1 character to be recognized as an Xon Any character, which
could cause an Xon2 character to be written to the RX FIFO.
18
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