TL16C752D Datasheet, PDF (21/56 Pages) Texas Instruments – TL16C752D Dual UART With 64-Byte FIFO

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TL16C752D
SLLSEN8B – SEPTEMBER 2015 – REVISED MARCH 2016
8.3.1.7 Reset
Table 2 summarizes the state of outputs after reset.
Table 2. Register Reset Functions⁽¹⁾
REGISTER
Interrupt enable register
Interrupt identification register
FIFO control register
Line control register
Modem control register
Line status register
Modem status register
Enhanced feature register
Receiver holding register
Transmitter holding register
Transmission control register
Trigger level register
Alternate function register
RESET CONTROL
RESET STATE
RESET
All bits cleared
RESET
Bit 0 is set. All other bits cleared.
RESET
All bits cleared
RESET
Reset to 00011101 (1D hex)
RESET
All bits cleared
RESET
Bits 5 and 6 set. All other bits cleared.
RESET
Bits 0 to 3 cleared. Bits 4 to 7 input signals.
RESET
All bits cleared
RESET
Pointer logic cleared
RESET
Pointer logic cleared
RESET
All bits cleared
RESET
All bits cleared
RESET
All bits (except AFR4) cleared; AFR4 set
(1) Registers DLL, DLH, SPR, Xon1, Xon2, Xoff1, and Xoff2 are not reset by the top-level reset signal
RESET, that is, they hold their initialization values during reset.
Table 3 summarizes the state of outputs after reset.
Table 3. Signal Reset Functions
SIGNAL
TX
RTS
DTR
RXRDYA–B
TXRDYA–B
RESET CONTROL
RESET
RESET
RESET
RESET
RESET
RESET STATE
High
High
High
High
Low
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