TL16C752D Datasheet, PDF (26/56 Pages) Texas Instruments – TL16C752D Dual UART With 64-Byte FIFO

TL16C752D
SLLSEN8B – SEPTEMBER 2015 – REVISED MARCH 2016
Figure 23 shows the crystal clock circuit reference.
External
Clock
Driver
XTAL1
Optional
Clock
Output
Optional
Driver
XTAL2
V_CC
XTAL1
C1
Crystal
R_p
Oscillator Clock
to Baud Generator
Logic
C2
RX2
XTAL2
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V_CC
Oscillator Clock
to Baud Generator
Logic
A. For crystal with fundamental frequency from 1 to 24 MHz
B. For input clock frequency higher than 24 MHz, the crystal is not allowed and the oscillator must be used, because the
TL16C752D internal oscillator cell can only support the crystal frequency up to 24 MHz.
Figure 23. Typical Crystal Clock Circuits
8.4 Device Functional Modes
8.4.1 DMA Signaling
There are two modes of DMA operation, DMA mode 0 or 1, selected by FCR[3].
In DMA mode 0 or FIFO disable (FCR[0] = 0), DMA occurs in single character transfers. In DMA mode 1,
multicharacter (or block) DMA transfers are managed to relieve the processor for longer periods of time.
8.4.1.1 Single DMA Transfers (DMA Mode0 or FIFO Disable)
Transmitter: When empty, the TXRDY signal becomes active. TXRDY goes inactive after one character has
been loaded into it.
Receiver: RXRDY is active when there is at least one character in the FIFO. It becomes inactive when the
receiver is empty.
Figure 24 shows TXRDY and RXRDY in DMA mode 0 or FIFO disable.
TX
TXRDY
RX
RXRDY
wrptr
At Least One
Location Filled
TXRDY
rdptr
At Least One
Location Filled
RXRDY
wrptr
FIFO Empty
rdptr
FIFO Empty
Figure 24. TXRDY and RXRDY in DMA Mode 0 or FIFO Disable
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