DRV8303_15 Datasheet, PDF (4/37 Pages) Texas Instruments – Three Phase Gate Driver

DRV8303
SLOS846B – SEPTEMBER 2013 – REVISED NOVEMBER 2015
www.ti.com
PIN
NAME
NO.
DVDD
19
REF
20
SO1
21
SO2
22
AVDD
23
AGND
24
PVDD
25
SP2
SN2
SP1
SN1
SL_C
GL_C
SH_C
GH_C
BST_C
SL_B
GL_B
SH_B
GH_B
BST_B
SL_A
GL_A
SH_A
GH_A
BST_A
VDD_SPI
GND
(PWR_PAD)
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46, 47,
48, 49
Pin Functions (continued)
I/O
DESCRIPTION
P
Internal 3.3-V supply voltage. DVDD cap should connect to AGND. This is an output, but not specified to
drive external circuitry.
I
Reference voltage to set output of shunt amplfiiers with a bias voltage which equals to half of the
voltage set on this pin. Connect to ADC reference in microcontroller.
O Output of current amplifier 1
O Output of current amplifier 2
P
Internal 6-V supply voltage, AVDD capacitor should always be installed and connected to AGND. This is
an output, but not specified to drive external circuitry.
P Analog ground pin
P
Power supply pin for gate driver, current shunt amplifier, and SPI communication. PVDD cap should
connect to GND
I
Input of current amplifier 2 (connecting to positive input of amplifier). Recommend to connect to ground
side of the sense resistor for the best commom mode rejection.
I Input of current amplifier 2 (connecting to negative input of amplifier).
I
Input of current amplifier 1 (connecting to positive input of amplifier). Recommend to connect to ground
side of the sense resistor for the best commom mode rejection.
I Input of current amplifier 1 (connecting to negative input of amplifier).
I
Low-Side MOSFET source connection, half-bridge C. Low-side V_DS measured between this pin and
SH_C.
O Gate drive output for Low-Side MOSFET, half-bridge C
I
High-Side MOSFET source connection, half-bridge C. High-side V_DS measured between this pin and
PVDD.
O Gate drive output for High-Side MOSFET, half-bridge C
P Bootstrap capacitor pin for half-bridge C
I
Low-Side MOSFET source connection, half-bridge B. Low-side V_DS measured between this pin and
SH_B.
O Gate drive output for Low-Side MOSFET, half-bridge B
I
High-Side MOSFET source connection, half-bridge B. High-side V_DS measured between this pin and
PVDD.
O Gate drive output for High-Side MOSFET, half-bridge B
P Bootstrap cap pin for half-bridge B
I
Low-Side MOSFET source connection, half-bridge A. Low-side V_DS measured between this pin and
SH_A.
O Gate drive output for Low-Side MOSFET, half-bridge A
I
High-Side MOSFET source connection, half-bridge A. High-side V_DS measured between this pin and
PVDD.
O Gate drive output for High-Side MOSFET, half-bridge A
P Bootstrap capacitor pin for half-bridge A
I SPI supply pin to support 3.3V or 5V logic. Connect to either 3.3V or 5V.
GND pin. The exposed power pad must be electrically connected to ground plane through soldering to
O PCB for proper operation and connected to bottom side of PCB through vias for better thermal
spreading.
4
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