DRV8303_15 Datasheet, PDF (13/37 Pages) Texas Instruments – Three Phase Gate Driver

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DRV8303
SLOS846B – SEPTEMBER 2013 – REVISED NOVEMBER 2015
7.3 Feature Description
The following sections describe the DRV8303 features:
7.3.1 Three-Phase Gate Driver
The half-bridge drivers use a bootstrap configuration with a trickle charge pump to support 100% duty cycle
operation. Each half-bridge is configured to drive two N-channel MOSFETs, one for the high-side and one for the
low-side. The half-bridge drivers can be used in combination to drive a 3-phase motor or separately to drive
various other loads.
The peak gate drive current and internal dead times are adjustable to accommodate a variety of external
MOSFETs and applications. The peak gate drive current is set through a register setting and the dead time is
adjusted with an external resistor on the DTC pin. Shorting the DTC pin to ground will provide the minimum dead
time (50 ns). There is an internal hand shake between the high side and low side MOSFETs during switching
transitions to prevent current shoot through.
The three-phase gate driver can provide up to 30 mA of average gate drive current. This will support switching
frequencies up to 200 kHz when the MOSFET Qg = 25 nC.
Each MOSFET gate driver has a VDS sensing circuit for overcurrent protection. The sense circuit measures the
voltage from the drain to the source of the external MOSFETs while the MOSFET is enabled. This voltage is
compared against the programmed trip point to determine if an overcurrent event has occurred. The high-side
sense is between the PVDD1 and SH_X pins. The low-side sense is between the SH_X and SL_X pins.
Ensuring a differential, low impedance connection to the external MOSFETs for these lines will help provide
accurate VDS sensing.
The DRV8303 allows for both 6-PWM and 3-PWM control through a register setting.
INL_X
0
0
1
1
Table 1. 6-PWM Mode
INH_X
0
1
0
1
GL_X
L
L
H
L
GH_X
L
H
L
L
INL_X
X
X
Table 2. 3-PWM Mode
INH_X
0
1
GL_X
H
L
GH_X
L
H
Table 3. Gate Driver External Components
NAME
R_nOCTW
R_nFAULT
R_DTC
C_GVDD
C_CP
C_DVDD
C_AVDD
C_PVDD
C_{BST_X}
PIN 1
nOCTW
nFAULT
DTC
GVDD
CP1
DVDD
AVDD
PVDD
BST_X
PIN 2
V_CC ⁽¹⁾
V_CC ⁽¹⁾
GND (PowerPAD)
GND (PowerPAD)
CP2
AGND
AGND
GND (PowerPAD)
SH_X
RECOMMENDED
≥10 kΩ
≥10 kΩ
0 to 150 kΩ (50 ns to 500 ns)
2.2-µF (20%) ceramic, ≥ 16 V
0.022-µF (20%) ceramic, rated for PVDD
1-µF (20%) ceramic, ≥ 6.3 V
1-µF (20%) ceramic, ≥ 10 V
≥4.7-µF (20%) ceramic, rated for PVDD
0.1-µF (20%) ceramic, ≥ 16 V
(1) V_CC is the logic supply to the MCU
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