DRV8303_15 Datasheet, PDF (16/37 Pages) Texas Instruments – Three Phase Gate Driver

DRV8303
SLOS846B – SEPTEMBER 2013 – REVISED NOVEMBER 2015
www.ti.com
A specific PVDD undervoltage transient brownout from 13 to 15 µs can cause the DRV8303 to become
unresponsive to external inputs until a full power cycle. The transient condition consists of having PVDD greater
than the PVDD_UV level and then PVDD dropping below the PVDD_UV level for a specific period of 13 to 15 µs.
Transients shorter or longer than 13 to 15 µs will not affect the normal operation of the undervoltage protection.
Additional bulk capacitance can be added to PVDD to reduce undervoltage transients.
7.3.3.4 Overvoltage Protection (GVDD_OV)
The device will shut down both the gate driver and charge pump if the GVDD voltage exceeds the GVDD_OV
threshold to prevent potential issues related to the GVDD pin or the charge pump (for example, short of external
GVDD cap or charge pump). The fault is a latched fault and can only be reset through a reset transition on the
EN_GATE pin.
7.3.3.5 Overtemperature Protection
A two-level over-temperature detection circuit is implemented:
• Level 1: over temperature warning (OTW)
OTW is reported through nOCTW pin (over-current-temperature warning) for default setting. OCTW pin can
be set to report OTW or OCW only through SPI command. See SPI Register section.
• Level 2: over temperature (OT) latched shut down of gate driver and charge pump (OTSD_GATE)
Fault will be reported to nFAULT pin. This is a latched shut down, so gate driver will not be recovered
automatically even OT condition is not present anymore. An EN_GATE reset through pin or SPI
(RESET_GATE) is required to recover gate driver to normal operation after temperature goes below a preset
value, t_{OTSD_CLR}.
SPI operation is still available and register settings will be remaining in the device during OTSD operation as long
as PVDD is still within defined operation range.
7.3.3.6 Fault and Protection Handling
The nFAULT pin indicates an error event with shut down has occurred such as over-current, over-temperature,
overvoltage, or undervoltage. Note that nFAULT is an open-drain signal. nFAULT will go high when gate driver is
ready for PWM signal (internal EN_GATE goes high) during start up.
The nOCTW pin indicates overcurrent event and over temperature event that not necessary related to shut
down.
Following is the summary of all protection features and their reporting structure:
EVENT
PVDD
undervoltage
DVDD
undervoltage
GVDD
undervoltage
GVDD
overvoltage
OTW
Table 4. Fault and Warning Reporting and Handling
ACTION
External FETs HiZ;
Weak pulldown of all gate
driver output
External FETs HiZ;
Weak pulldown of all gate
driver output; When recovering,
reset all status registers
External FETs HiZ;
Weak pulldown of all gate
driver output
External FETs HiZ;
Weak pulldown of all gate driver
output
Shut down the charge pump
Won’t recover and reset through
SPI reset command or
quick EN_GATE toggling
None
LATCH
REPORTING ON REPORTING ON
nFAULT PIN
nOCTW PIN
N
Y
N
N
Y
N
N
Y
N
Y
Y
N
N
N
Y (in default
setting)
REPORTING IN SPI
STATUS REGISTER
Y
N
Y
Y
Y
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