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DAC8562SDSCT Datasheet, PDF (39/58 Pages) Texas Instruments – DUAL 16-/14-/12-BIT, ULTRALOW-GLITCH, LOW-POWER, BUFFERED, VOLTAGE-OUTPUT DAC WITH 2.5-V, 4-PPM/°C INTERNAL REFERENCE IN SMALL 3-MM × 3-MM SON
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DAC8562, DAC8563
DAC8162, DAC8163
DAC7562, DAC7563
SLAS719D – AUGUST 2010 – REVISED AUGUST 2012
Load Regulation
Load regulation is defined as the change in reference output voltage as a result of changes in load current. The
load regulation of the internal reference is measured using force and sense contacts as shown in Figure 95. The
force and sense lines reduce the impact of contact and trace resistance, resulting in accurate measurement of
the load regulation contributed solely by the internal reference. Measurement results are shown in Figure 4.
Force and sense lines should be used for applications that require improved load regulation.
Output Pin
Contact and
Trace Resistance
VOUT
Sense Line
Meter
Force Line
IL
Load
Figure 95. Accurate Load Regulation of the DAC756x/DAC816x/DAC856x Internal Reference
Long-Term Stability
Long-term stability/aging refers to the change of the output voltage of a reference over a period of months or
years. This effect lessens as time progresses. The typical drift value for the internal reference is listed in the
Electrical Charateristics and measurement results are shown in Figure 5. This parameter is characterized by
powering up multiple devices and measuring them at regular intervals.
Thermal Hysteresis
Thermal hysteresis for a reference is defined as the change in output voltage after operating the device at 25°C,
cycling the device through the operating temperature range, and returning to 25°C. Hysteresis is expressed by
Equation 4:
VHYST =
é
ê
VREF_PRE
-
VREF_POST
ù
ú
êë
VREF_NOM
úû
´ 106(ppm/°C)
(4)
Where:
VHYST = thermal hysteresis.
VREF_PRE = output voltage measured at 25°C pre-temperature cycling.
VREF_POST = output voltage measured after the device cycles through the temperature range of –40°C to
aaa 125°C, and returns to 25°C.
VREF_NOM = 2.5 V, target value for reference output voltage.
DAC NOISE PERFORMANCE
Output noise spectral density at the VOUT-n pin versus frequency is depicted in Figure 45 and Figure 46 for full-
scale, mid-scale, and zero-scale input codes. The typical noise density for mid-scale code is 90 nV/√Hz at 1 kHz.
High-frequency noise can be improved by filtering the reference noise. Integrated output noise between 0.1 Hz
and 10 Hz is close to 2.5 µVPP (mid-scale), as shown in Figure 47.
Copyright © 2010–2012, Texas Instruments Incorporated
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