DAC8562SDSCT Datasheet, PDF (34/58 Pages) Texas Instruments – DUAL 16-/14-/12-BIT, ULTRALOW-GLITCH, LOW-POWER, BUFFERED, VOLTAGE-OUTPUT DAC WITH 2.5-V, 4-PPM/°C INTERNAL REFERENCE IN SMALL 3-MM × 3-MM SON

DAC8562, DAC8563
DAC8162, DAC8163
DAC7562, DAC7563
SLAS719D – AUGUST 2010 – REVISED AUGUST 2012
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GAIN REGISTERS
The gain register controls the GAIN setting in the DAC transfer function:
V_{O UT}
=
æ
ç
è
D_IN
2ⁿ
ö
÷
ø
´
V_REF
´ Gain
(2)
The DAC756x, DAC816x, and DAC856x have a gain register for each channel. The gain for each channel, in
Equation 2, is either 1 or 2. This gain is automatically set to 2 when using the internal reference, and is
automatically set to 1 when the internal reference is disabled (default). However, each channel can have either
gain by setting the registers appropriately. The gain registers are accessible by using command bits = 000 and
address bits = 010, and using DB1 for DAC-B and DB0 for DAC-A. See Table 13 or Table 14 and Table 15 for
the full command structure. The gain registers are automatically reset to provide either gain of 1 or 2 when the
internal reference is powered off or on, respectively. After the reference is powered off or on, the gain register is
again accessible to change the gain.
Table 14. Gain Register Command Structure
Command
Address
Data
X X 0 0 0 0 1 0 X X X X X X X X X X X X X X DAC-B DAC-A
DB23
DB0
DB1/DB0
DB0
DB1
Table 15. DAC-n Selection for Gain Register Command
Value
0
1
0
1
Gain
DAC-A uses gain = 2 (default with internal reference)
DAC-A uses gain = 1 (default with external reference)
DAC-B uses gain = 2 (default with internal reference)
DAC-B uses gain = 1 (default with external reference)
34
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