DAC8562SDSCT Datasheet, PDF (18/58 Pages) Texas Instruments – DUAL 16-/14-/12-BIT, ULTRALOW-GLITCH, LOW-POWER, BUFFERED, VOLTAGE-OUTPUT DAC WITH 2.5-V, 4-PPM/°C INTERNAL REFERENCE IN SMALL 3-MM × 3-MM SON

DAC8562, DAC8563
DAC8162, DAC8163
DAC7562, DAC7563
SLAS719D – AUGUST 2010 – REVISED AUGUST 2012
www.ti.com
TYPICAL CHARACTERISTICS: DAC at AV_DD = 5.5 V (continued)
At T_A = 25°C, 5-V external reference used, gain = 1 and DAC output not loaded, unless otherwise noted.
CHANNEL-TO-CHANNEL CROSSTALK
CHANNEL-TO-CHANNEL CROSSTALK
5-V RISING EDGE
5-V FALLING EDGE
LDAC Trigger (5 V/div)
V_OUTB (1 V/div)
V_OUTA (500 μV/div)
LDAC Trigger (5 V/div)
6.4 μs
Glitch Area (Between Cursors) = 2 nV-s
V_OUTA (500 μV/div)
7.3 μs
Glitch Area (Between Cursors) = 1.6 nV-s
V_OUTA at Midscale Code
Internal Reference Enabled
Gain = 2
Time (5 μs/div)
Figure 43.
1400
1200
1000
DAC OUTPUT NOISE DENSITY
vs FREQUENCY
Internal reference disabled
V_REFIN = 5 V, Gain = 1
Full Scale
Mid Scale
Zero Scale
800
600
400
200
0
10
100
1k
10k
100k
Frequency (Hz)
Figure 45.
DAC OUTPUT NOISE
0.1 Hz TO 10 Hz
V_OUTA at Midscale Code
Internal Reference Enabled
Gain = 2
V_OUTB (1 V/div)
1400
1200
1000
800
600
400
200
0
10
Time (5 μs/div)
Figure 44.
DAC OUTPUT NOISE DENSITY
vs FREQUENCY
Internal reference enabled
Gain = 2
Full Scale
Mid Scale
Zero Scale
100
1k
10k
Frequency (Hz)
Figure 46.
CLOCK FEEDTHROUGH
500 kHz, MIDSCALE
SCLK (5 V/div)
100k
» 2.5 μV_PP
Figure 47.
DAC = Midscale
V_OUT (500 μV/div)
Clock Feedthrough Impulse » 0.06 nV-s
Time (500 ns/div)
Figure 48.
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