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| DRV2604L Datasheet, PDF (31/73 Pages) Texas Instruments – DRV2604L 2- to 5.2-V Haptic Driver for LRA and ERM with Internal Memory and Smart-Loop Architecture | |||
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www.ti.com
DRV2604L
SLOS866D â MAY 2014 â REVISED JUNE 2015
Programming (continued)
8.5.8.1.1 Open-Loop Mode
In open-loop mode, the reference level for full-scale drive is set by the OD_CLAMP[7:0] bit in Register 0x17. A
mid-scale input value gives no drive signal, and a less-than mid-scale gives a negative drive value. For an ERM,
a negative drive value results in counter-rotation, or braking. For an LRA, a negative drive value results in a 180-
degree phase shift in commutation.
The RTP mode has 8 bits of resolution over the I2C bus. The RTP data can either be in a signed (2s
complement) or unsigned format as defined by the DATA_FORMAT_RTP bit.
Steady-State
Output Magnitude
Open Loop
ERM_OPEN_LOOP = 1 OR LRA_OPEN_LOOP = 1
OD_CLAMP[7:0]
0V
-OD_CLAMP[7:0]
Input Interface
PWM
0%
RTP (8-bit) DATA_FORMAT_RTP = 0 0x81
RTP (8-bit) DATA_FORMAT_RTP = 1 0x00
Figure 25.
50%
0x00
0x7F
Input
100%
0x7F
0xFF
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