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DRV2604L Datasheet, PDF (3/73 Pages) Texas Instruments – DRV2604L 2- to 5.2-V Haptic Driver for LRA and ERM with Internal Memory and Smart-Loop Architecture
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5 Pin Configuration and Functions
YZF Package
9-Pin DSBGA With 0.5-mm Pitch
(Top View)
A
EN
REG
OUT+
B
IN/TRIG
SDA
GND
DRV2604L
SLOS866D – MAY 2014 – REVISED JUNE 2015
C
SCL
VDD
OUT±
1
2
3
Pin Functions
PIN
NO.
NAME
TYPE (1)
DESCRIPTION
A1
EN
I
Device enable
A2
REG
O
The REG pin is the 1.8-V regulator output. A 1-µF capacitor is required.
A3
OUT+
O
Positive haptic driver differential output
B1
IN/TRIG
I
Multi-mode Input. I2C selectable as PWM, analog, or trigger. If not used, this pin should
be connected to GND
B2
SDA
I/O
I2C data
B3
GND
P
Supply ground
C1
SCL
I
I2C clock
C3
OUT–
O
Negative haptic-driver differential output
C2
VDD
P
Supply input (2 to 5.2 V). A 1-µF capacitor is required.
(1) I = input, O = output, I/O = input and output, P = power
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