DS92LV0411_14 Datasheet, PDF (26/53 Pages) Texas Instruments – 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

DS92LV0411, DS92LV0412
SNLS331B – MAY 2010 – REVISED APRIL 2013
www.ti.com
RxCLKIN +/-
RxIN3 +/-
RxIN2 +/-
RxIN1 +/-
RxIN0 +/-
Previous cycle
DE
(bit 20)
B[1]
(bit 26)
VS
(bit 19)
Current cycle
B[0]
(bit 25)
HS
(bit 18)
G[1]
(bit 24)
G[0]
(bit 23)
B[7]
(bit 17)
B[6]
(bit 16)
R[1]
(bit 22)
B[5]
(bit 15)
B[3]
(bit 13)
B[2]
(bit 12)
G[7]
(bit 11)
G[6]
(bit 10)
G[5]
(bit 9)
G[4]
(bit 8)
G[2]
(bit 6)
R[7]
(bit 5)
R[6]
(bit 4)
R[5]
(bit 3)
R[4]
(bit 2)
Figure 22. 8–bit Channel Link Mapping: LSB's on RxIN3
R[3]
(bit 1)
R[0]
(bit 21)
B[4]
(bit 14)
G[3]
(bit 7)
R[2]
(bit 0)
RxCLKIN +/-
RxIN3 +/-
RxIN2 +/-
RxIN1 +/-
RxIN0 +/-
Previous cycle
Current cycle
B[7]
(bit 26)
B[6]
(bit 25)
G[7]
(bit 24)
G[6]
(bit 23)
R[7]
(bit 22)
DE
(bit 20)
VS
(bit 19)
HS
(bit 18)
B[5]
(bit 17)
B[4]
(bit 16)
B[3]
(bit 15)
R[6]
(bit 21)
B[2]
(bit 14)
B[1]
(bit 13)
B[0]
(bit 12)
G[5]
(bit 11)
G[4]
(bit 10)
G[3]
(bit 9)
G[2]
(bit 8)
G[0]
(bit 6)
R[5]
(bit 5)
R[4]
(bit 4)
R[3]
(bit 3)
R[2]
(bit 2)
Figure 23. 8–bit Channel Link Mapping: MSB's on RxIN3
R[1]
(bit 1)
G[1]
(bit 7)
R[0]
(bit 0)
26
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