DS92LV0411_14 Datasheet, PDF (16/53 Pages) Texas Instruments – 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

DS92LV0411, DS92LV0412
SNLS331B – MAY 2010 – REVISED APRIL 2013
AC Timing Diagrams and Test Circuits
RxIN[3:0]+
RxCLKIN+
VTL
VCM=1.2V
RxIN[3:0]-
RxClkIN-
VTH
GND
Figure 3. Channel Link DC VTH/VTL Definition
A
C_A
A' _Scope
50:
50:
B
C_B
B'
50:
50:
Figure 4. DS92LV0411 Output Test Circuit
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DOUT+
DOUT-
GND
VOD+
VOS
VOD-
(DOUT+) - (DOUT+)
VOD+
VODp-p
0V
VOD-
Figure 5. Channel Link II Single-ended and Differential Waveforms
(DOUT+) - (DOUT-)
80%
20%
t_LLHT
t_LHLT
Figure 6. DS92LV0411 Output Transition Times
+VOD
0V
-VOD
16
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