DS92LV0411_14 Datasheet, PDF (25/53 Pages) Texas Instruments – 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

DS92LV0411, DS92LV0412
www.ti.com
SNLS331B – MAY 2010 – REVISED APRIL 2013
OPERATING MODES AND BACKWARD COMPATIBILITY (CONFIG[1:0])
The DS92LV0411 and DS92LV0412 are backward compatible with previous generations of Ser/Des.
Configuration modes are provided for backwards compatibility with the DS90C241/DS90C124 and also the
DS90UR241/DS90UR124 and DS99R241/DS99R124 by setting the respective mode with the CONFIG[1:0] pins
as shown in Table 2 and Table 3. The selection also determine whether the Video Control Signal filter feature is
enabled or disabled in Normal mode. Backward compatibility modes are selectable through the control pins only.
The Control Signal Filter can be selected by pin or through register programming.
CON
FIG1
L
L
H
H
CON
FIG0
L
H
L
H
Table 2. DS92LV0411 Configuration Modes
Mode
Des Device
Normal Mode, Control Signal Filter disabled
Normal Mode, Control Signal Filter enabled
Backwards Compatible
Backwards Compatible
DS92LV0412,
DS92LV2412
DS92LV0412,
DS92LV2412
DS90UR124,
DS99R124
DS90C124
CON
FIG1
L
L
H
H
CON
FIG0
L
H
L
H
Table 3. DS92LV0412 Configuration Modes
Mode
Des Device
Normal Mode, Control Signal Filter disabled
Normal Mode, Control Signal Filter enabled
Backwards Compatible
Backwards Compatible
DS92LV0411,
DS92LV2411
DS92LV0411,
DS92LV2411
DS90UR241,
DS99R421
DS90C241
BIT MAPPING SELECT
The DS92LV0411 and DS92LV0412 can be configured to accept the LVDS parallel data with 2 different mapping
schemes: LSBs on RxIN[3] shown in Figure 22 or MSBs on RxIN[3] shown in Figure 23. The user selects which
mapping scheme is controlled by MAPSEL pin or by Register.
NOTE
While the LVDS interface has 28 bits defined, only 27 bits are recovered by the Ser and
sent to the Des. This supports 24 bit RGB plus the three video control signals. The 28th
bit is not sampled, sent or recovered.
Copyright © 2010–2013, Texas Instruments Incorporated
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