DS90UR910Q_14 Datasheet, PDF (13/31 Pages) Texas Instruments – 10 - 75 MHz 24-bit Color FPD-Link II to CSI-2 Converter

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Clock Lane
DS90UR910Q
SNLS414C – JUNE 2012 – REVISED MAY 2013
Data Lane
Dp/Dn
VIH(min)
VIL(max)
T_LPX
T_HS-ZERO
THS-PREPARE
T_HS-SYNC
LP-11
T_D-TERM-EN
LP-01
LP-00
T_HS-SETTLE
Capture
1^st Data Bit
Figure 5. High Speed Data Transmission Burst
Clock Lane
Dp/Dn
T_CLK-POST
VIH(min)
VIL(max)
T_EOT
T_CLK-MISS
Disconnect
Terminator
T_CLK-SETTLE
TCLK-TERM-EN
Disconnect
Terminator
T_REOT
T_HS-SKIP LP-11
T_EOT
T_HS-TRAIL
T_HS-EXIT
T_CLK-TRAIL
Data Lane
Dp/Dn
Disconnect
Terminator
T_HS-EXIT
T_LPX
T_CLK-ZERO
T_CLK-PREPARE
T_CLK-PRE
T_LPX
T_HS-PREPARE
VIH(min)
VIL(max)
T_HS-SKIP
T_D-TERM-EN
T_HS-SETTLE
Figure 6. Switching the Clock Lane between Clock Transmission and Low-Power Mode
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