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| CC430F5125 Datasheet, PDF (52/118 Pages) Texas Instruments – MSP430 SoC With RF Core | |||
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CC430F614x
CC430F514x
CC430F512x
ECCN 5E002 TSPA - Technology / Software Publicly Available
SLAS555A â NOVEMBER 2012 â REVISED FEBRUARY 2013
www.ti.com
PMM, Brown-Out Reset (BOR)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
V(DVCC_BOR_IT-)
V(DVCC_BOR_IT+)
V(DVCC_BOR_hys)
tRESET
BORH on voltage,
DVCC falling level
BORH off voltage,
DVCC rising level
BORH hysteresis
Pulse duration required at RST/NMI pin to accept a reset
| dDVCC/dt | < 3 V/s
| dDVCC/dt | < 3 V/s
0.80 1.30
60
2
MAX UNIT
1.45 V
1.50 V
250 mV
µs
PMM, Core Voltage
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
VCORE3(AM)
VCORE2(AM)
VCORE1(AM)
VCORE0(AM)
VCORE3(LPM)
VCORE2(LPM)
VCORE1(LPM)
VCORE0(LPM)
Core voltage, active mode, PMMCOREV = 3
Core voltage, active mode, PMMCOREV = 2
Core voltage, active mode, PMMCOREV = 1
Core voltage, active mode, PMMCOREV = 0
Core voltage, low-current mode, PMMCOREV = 3
Core voltage, low-current mode, PMMCOREV = 2
Core voltage, low-current mode, PMMCOREV = 1
Core voltage, low-current mode, PMMCOREV = 0
2.4 V ⤠DVCC ⤠3.6 V
2.2 V ⤠DVCC ⤠3.6 V
2.0 V ⤠DVCC ⤠3.6 V
1.8 V ⤠DVCC ⤠3.6 V
2.4 V ⤠DVCC ⤠3.6 V
2.2 V ⤠DVCC ⤠3.6 V
2.0 V ⤠DVCC ⤠3.6 V
1.8 V ⤠DVCC ⤠3.6 V
1.90
1.80
1.60
1.40
1.93
1.90
1.70
1.50
MAX
UNIT
V
V
V
V
V
V
V
V
52
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