GC1115 Datasheet, PDF (45/80 Pages) Texas Instruments – Crest Factor Reduction Processor

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GC1115
SLWS144 – FEBRUARY 2005
CRC_RESULT 0x18 (24) Type: Read Only Value at RESET: 0x0000
The CRC_RESULT register holds the CRC generator value. The signal generator must be properly configured to
ensure a periodic signal for the CRC_RESULT to be repeatable. The SIG_GEN_SYNC event must have the
same period as the signal generator, otherwise the CRC_RESULT will be invalid. Contact TI to receive an
appropriate set of signal generator configuration and CRC_RESULT values.
BITS
[15:0]
DESCRIPTION
CRC result (reaches steady state after four SIG_GEN_SYNC events)
Synchronization Registers (Addresses 25 – 37)
RCV_SYNC
0x19 (25) Type: Read/Write Value at RESET: 0x0000
The RCV_SYNC register selects the synchronization source for the GC1115’s receive datapath. SYNC_A or
SYNC_B must be used as the RCV_SYNC source.
BITS
[2:0]
[15:3]
RCV_SYNC selection:
0: invalid
1: invalid
3: SYNC_A
4: SYNC_B
6: invalid
7: invalid
Reserved
DESCRIPTION
2: invalid
5: invalid
STAGE_SYNC 0x1A (26) Type: Read/Write Value at RESET: 0x0000
The STAGE_SYNC register selects the synchronization source for the GC1115’s PDC stages. SYNC_A or
SYNC_B must be used as the STAGE_SYNC source.
BITS
[2:0]
[15:3]
STAGE_SYNC selection:
0: invalid
1: invalid
3: SYNC_A
4: SYNC_B
6: invalid
7: invalid
Reserved
DESCRIPTION
2: invalid
5: invalid
DECIM_SYNC 0x1B (27) Type: Read/Write Value at RESET: 0x0000
The DECIM_SYNC register selects the synchronization source for the GC1115’s decimator. Because the
decimator processes input samples, a hardware synchronization source (SYNC_A or SYNC_B) must be used
when DECIMATE = 2, allowing the user to select which phase of the input signal stream is processed by the
decimator.
BITS
[2:0]
[15:3]
STAGE_SYNC selection:
0: invalid
3: SYNC_A
6: invalid
Reserved
DESCRIPTION
1: invalid
4: SYNC_B
7: invalid
2: invalid
5: invalid
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