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SLDS145B Datasheet, PDF (4/29 Pages) Texas Instruments – TFP410 TI PanelBus DIGITAL TRANSMITTER
TFP410
TI PanelBus™ DIGITAL TRANSMITTER
SLDS145B − OCTOBER 2001 − REVISED MAY 2011
Terminal Functions (Continued)
TERMINAL
NAME
I/O
NO.
CTL3/A3/DK3
6
I
CTL2/A2/DK2
7
CTL1/A1/DK1
8
Configuration/Programming
MSEN/PO1
11
O
ISEL/RST
13
I
BSEL/SCL
15
I
DSEL/SDA
14
I/O
EDGE/HTPLG
9
I
DESCRIPTION
The operation of these three multifunction inputs depends on the settings of the ISEL (pin 13) and
DKEN (pin 35) inputs. All three inputs support 3.3-V CMOS signal levels and contain weak pulldown
resistors so that if left unconnected they default to all low.
When the I2C bus is disabled (ISEL = low) and the de-skew mode is disabled (DKEN = low), these three
inputs become the control inputs, CTL[3:1], which can be used to send additional information across
the DVI link during the blanking interval (DE = low). The CTL3 input is reserved for HDCP compliant DVI
TXs (TFP510) and the CTL[2:1] inputs are reserved for future use.
When the I2C bus is disabled (ISEL = low) and the de-skew mode is enabled (DKEN = high), these
three inputs become the de-skew inputs DK[3:1], used to adjust the setup and hold times of the pixel
data inputs DATA[23:0], relative to the clock input IDCK±.
When the I2C bus is enabled (ISEL = high), these three inputs become the 3 LSBs of the I2C slave
address, A[3:1].
Monitor sense/programmable output 1. The operation of this pin depends on whether the I2C interface
is enabled or disabled. This pin has an open-drain output and is only 3.3-V tolerant. An external 5-kΩ
pullup resistor connected to VDD is required on this pin.
When I2C is disabled (ISEL = low), a low level indicates a powered on receiver is detected at the
differential outputs. A high level indicates a powered on receiver is not detected. This function is only
valid in dc-coupled systems.
When I2C is enabled (ISEL = high), this output is programmable through the I2C interface (see the I2C
register descriptions section).
I2C interface select/I2C RESET (active low, asynchronous)
If ISEL is high, then the I2C interface is active. Default values for the I2C registers can be found in the
I2C register descriptions section.
If ISEL is low, then I2C is disabled and the chip configuration is specified by the configuration pins
(BSEL, DSEL, EDGE, VREF) and state pins (PD, DKEN).
If ISEL is brought low and then back high, the I2C state machine is reset. The register values are
changed to their default values and are not preserved from before the reset.
Input bus select/I2C clock input. The operation of this pin depends on whether the I2C interface is
enabled or disabled. This pin is only 3.3-V tolerant.
When I2C is disabled (ISEL = low), a high level selects 24-bit input, single-edge input mode. A low level
selects 12-bit input, dual-edge input mode.
When I2C is enabled (ISEL = high), this pin functions as the I2C clock input (see the I2C register
descriptions section). In this configuration, this pin has an open-drain output that requires an external
5-kΩ pullup resistor connected to VDD.
DSEL/I2C data. The operation of this pin depends on whether the I2C interface is enabled or disabled.
This pin is only 3.3-V tolerant.
When I2C is disabled (ISEL = low), this pin is used with BSEL and VREF to select the single-ended or
differential input clock mode (see the universal graphics controller interface modes section).
When I2C is enabled (ISEL = high), this pin functions as the I2C bidirectional data line. In this
configuration, this pin has an open-drain output that requires an external 5-kΩ pullup resistor
connected to VDD.
Edge select/hot plug input. The operation of this pin depends on whether the I2C interface is enabled or
disabled. This input is 3.3-V tolerant only.
When I2C is disabled (ISEL = low), a high level selects the primary latch to occur on the rising edge of
the input clock IDCK+. A low level selects the primary latch to occur on the falling edge of the input clock
IDCK+. This is the case for both single-ended and differential input clock modes.
When I2C is enabled (ISEL = high), this pin is used to monitor the hot plug detect signal (see the DVI or
VESA™ P&D and DFP standards). When used for hot-plug detection, this pin requires a series 1-KΩ
resistor.
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