SLDS145B Datasheet, PDF (15/29 Pages) Texas Instruments – TFP410 TI PanelBus DIGITAL TRANSMITTER

TFP410
TI PanelBus™ DIGITAL TRANSMITTER
SLDS145B − OCTOBER 2001 − REVISED MAY 2011
device configuration and I²C RESET description
The TFP410 device configuration can be programmed by several different methods to allow maximum flexibility
for the user’s application. Device configuration is controlled depending on the state of the ISEL/RST pin,
configuration pins (BSEL, DSEL, EDGE, V_REF) and state pins (PD, DKEN). I²C bus select and I²C RESET
(active low) are shared functions on the ISEL/RST pin, which operates asynchronously.
Holding ISEL/RST low causes the device configuration to be set by the configuration pins (BSEL, DSEL, EDGE,
and V_REF) and state pins (PD, DKEN). The I²C bus is disabled.
Holding ISEL/RST high causes the chip configuration to be set based on the configuration bits (BSEL, DSEL,
EDGE) and state bits (PD, DKEN) in the I²C registers. The I²C bus is enabled.
Momentarily bringing ISEL/RST low and then back high while the device is operating in normal or power-down
mode will RESET the I²C registers to their default values. The device configuration will be changed to the default
power-up state with I²C enabled. After power up, the device must be reset. It is suggested that this pin be tied
to the system reset signal, which is low during power up and is then asserted high after all the power supplies
are fully functional.
DE generator
The TFP410 contains a DE generator that can be used to generate an internal DE signal when the original data
source does not provide one. There are several I²C programmable values that control the DE generator (see
Figure 9). DE_GEN in the DE_CTL register enables this function. When enabled, the DE pin is ignored.
DE_TOP and DE_LIN are line counts used to control the number of lines after VSYNC goes active that DE is
enabled, and the total number of lines that DE remains active, respectively. The polarity of VSYNC must be set
by VS_POL in the DE_CTL register.
DE_DLY and DE_CNT are pixel counts used to control the number of pixels after HSYNC goes active that DE
is enabled, and the total number of pixels that DE remains active, respectively. The polarity of HSYNC must be
set by HS_POL in the DE_CTL register.
The TFP410 also counts the total number of HSYNC pulses between VSYNC pulses, and the total number of
pixels between HSYNC pulses. These values, the total vertical and horizontal resolutions, are available in
V_RES and H_RES, respectively. These values are available at all times, whether or not the DE generator is
enabled.
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