RM0004 Datasheet, PDF (874/1176 Pages) STMicroelectronics – Programmer’s reference manual for Book E processors

RM0004
VLE instruction classes
12.4.8
exception type program interrupt is invoked. If none of the tested conditions are met,
instruction execution continues normally.
The contents of GPR(rA) are compared with the contents of GPR(rB). For twi and tw, only
the contents of bits 32–63 of rA (and rB) participate in the comparison.
This comparison results in five conditions that are ANDed with TO. If the result is not 0, the
trap exception type program interrupt is invoked. These conditions are as shown in
Table 248.
Table 248. Integer trap conditions
TO Bit
ANDed with condition
0
Less Than, using signed comparison
1
Greater Than, using signed comparison
2
Equal
3
Less Than, using unsigned comparison
4
Greater Than, using unsigned comparison
The integer trap instruction is listed in Table 249.
3
Table 249. Integer trap instruction set index
Mnemonic
Instruction
tw TO,rA,rB
Trap Word
Reference
Book E
Integer rotate and shift instructions
Instructions are provided that perform shifts and rotates on data from a GPR and return the
result, or a portion of the result, to a GPR.
The rotation operations rotate a 32-bit quantity left by a specified number of bit positions.
Bits that exit from position 32 enter at position 63.
The rotate₃₂ operation is used to rotate a given 32-bit quantity.
Some rotate and shift instructions employ a mask generator. The mask is 32 bits long, and
consists of 1 bits from a start bit, mstart, through and including a stop bit, mstop, and 0-bits
elsewhere. The values of mstart and mstop range from 32 to 63. If mstart > mstop, the 1 bits
wrap around from position 63 to position 0. Thus the mask is formed as follows:
if mstart ≤ mstop then
mask_mstart:mstop = ones
mask_{all other bits} = zeros
else
mask_mstart:63 = ones
mask_32:mstop = ones
mask_{all other bits} = zeros
There is no way to specify an all-zero mask.
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