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RM0004 Datasheet, PDF (784/1176 Pages) STMicroelectronics – Programmer’s reference manual for Book E processors
RM0004
Instruction set
_srawx
VLE User
Shift Right Algebraic Word [Immediate] [and Record]
se_sraw
rX,rY
0
5678
11 12
15
01000001
RY
RX
_srawx
se_srawi
rX,UI5
0
567
0110101
11 12
15
UI5
RX
if ‘se_sraw’ then n ← GPR(RY)59:63
if ‘se_srawi’ then n ← UI5
r ← ROTL32(GPR(RS or RX)32:63,32-n)
if ((se_sraw & GPR(RY)58=1) then m ← 320
else m ← MASK(n+32,63)
s ← GPR(RS or RX)32
result0:63 ← r&m | (32s)&¬m
if Rc=1 then do
LT ← result32:63 < 0
GT ← result32:63 > 0
EQ ← result32:63 = 0
CR0 ← LT || GT || EQ || SO
GPR(RA or RX) ← result32:63
CA ← s & ((r&¬m)32:63≠0)
If se_sraw, let the shift count n be the contents of bits 58–63 of GPR(rY).
If se_srawi, let the shift count n be the value of the UI5 field.
The contents of bits 32–63 of GPR(rS or rX) are shifted right n bits. Bits shifted out of
position 63 are lost. Bit 32 of rS or rX is replicated to fill vacated positions on the left. The
32-bit result is placed into bits 32–63 of GPR(rA or rX).
CA is set if bits 32–63 of GPR(rS or rX) contain a negative value and any 1 bits are shifted
out of bit position 63; otherwise CA is cleared.
A shift amount of zero causes GPR(rA or rX) to receive EXTS(GPR(rS or rX)32:63), and CA
to be cleared. For se_sraw, shift amounts from 32 to 63 give a result of 64 sign bits, and
cause CA to receive bit 32 of the contents of GPR(rS or rX) (that is, sign bit of GPR(rS or
rX)32:63).
Special Registers Altered: CA
CR0 (if Rc = 1)
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