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RM0004 Datasheet, PDF (622/1176 Pages) STMicroelectronics – Programmer’s reference manual for Book E processors
RM0004
Instruction set
evmwssfaa
SPE APU User
Vector multiply word signed, saturate, fractional and accumulate
evmwssfaa
rD,rA,rB
evmwssfaa
0
56
000100
10 11
15 16
20 21
31
rD
rA
rB
10101010011
Note:
temp0:63 ← rA32:63 ×sf rB32:63
if (rA32:63 = 0x8000_0000) & (rB32:63 = 0x8000_0000) then
temp0:63 ← 0x7FFF_FFFF_FFFF_FFFF //saturate
mov ← 1
else
mov ← 0
temp0:64 ← EXTS(ACC0:63) + EXTS(temp0:63)
ov ← (temp0 ⊕ temp1)
rD0:63 ← temp1:64 )
// update accumulator
ACC0:63 ← rD0:63
// update SPEFSCR
SPEFSCROVH ← 0
SPEFSCROV ← mov
SPEFSCRSOV ← SPEFSCRSOV | ov | mov
The low word signed fractional elements in rA and rB are multiplied producing a 64-bit
product. If both inputs are –1.0, the product saturates to the largest positive signed fraction.
The 64-bit product is added to the ACC and the result is placed in rD and the ACC.
If there is an overflow from either the multiply or the addition, the SPEFSCR overflow and
summary overflow bits are recorded.
There is no saturation on the addition with the accumulator.
Other registers altered: SPEFSCR ACC
Figure 135. Vector multiply word signed, saturate, fractional, & accumulate
(evmwssfaa)
0
31 32
63
rA
rB
X
+
Intermediate product
Accumulator
rD and Accumulator
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