LSM330 Datasheet, PDF (62/75 Pages) STMicroelectronics – Power-down and sleep modes

Register description
LSM330
Table 107. High-pass filter cutoff frequency configuration [Hz]⁽¹⁾
HPCF[3:0]
ODR=95 Hz
ODR=190 Hz
ODR=380 Hz
ODR=760 Hz
0000
7.2
13.5
27
51.4
0001
3.5
7.2
13.5
27
0010
1.8
3.5
7.2
13.5
0011
0.9
1.8
3.5
7.2
0100
0.45
0.9
1.8
3.5
0101
0.18
0.45
0.9
1.8
0110
0.09
0.18
0.45
0.9
0111
0.045
0.09
0.18
0.45
1000
0.018
0.045
0.09
0.18
1001
0.009
0.018
0.045
0.09
1. Values in the table are indicative and can vary proportionally with the specific ODR value.
8.59
CTRL_REG3_G (22h)
Angular rate sensor control register 3 (r/w).
I1_Int1
Table 108. CTRL_REG3_G register
I1_Boot H_Lactive PP_OD I2_DRDY I2_WTM I2_ORun I2_Empty
I1_Int1
I1_Boot
H_Lactive
PP_OD
I2_DRDY
I2_WTM
I2_ORun
I2_Empty
Table 109. CTRL_REG3_G description
Interrupt enable on INT1_G pin. Default value: 0. (0: Disable; 1: Enable)
Boot status available on INT1_G. Default value: 0. (0: Disable; 1: Enable)
Interrupt active configuration on INT1_G. Default value: 0. (0: High; 1: Low)
Push-pull / Open drain. Default value: 0. (0: Push-pull; 1: Open drain)
Date ready on DRDY_G/INT2_G. Default value: 0. (0: Disable; 1: Enable)
FIFO watermark interrupt on DRDY_G/INT2_G. Default value: 0.
(0: Disable; 1: Enable)
FIFO overrun interrupt on DRDY_G/INT2_G Default value: 0. (0: Disable; 1: Enable)
FIFO empty interrupt on DRDY_G/INT2_G. Default value: 0. (0: Disable; 1: Enable)
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