LSM330 Datasheet, PDF (17/75 Pages) STMicroelectronics – Power-down and sleep modes

LSM330
Module specifications
2.4.2
I²C - inter-IC control interface
Subject to general operating conditions for Vdd and T_OP.
Symbol
Table 7. I²C slave timing values
Parameter⁽¹⁾
I²C standard mode ⁽¹⁾
Min.
Max.
I²C fast mode ⁽¹⁾
Min.
Max.
f_(SCL)
t_w(SCLL)
t_w(SCLH)
t_su(SDA)
t_h(SDA)
t_r(SDA) t_r(SCL)
t_f(SDA) t_f(SCL)
t_h(ST)
t_su(SR)
SCL clock frequency
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
Repeated START condition
setup time
0
4.7
4.0
250
0.01
4
4.7
100
0
400
1.3
0.6
100
3.45
0
0.9
1000
20 + 0.1C_b ⁽²⁾
300
300
20 + 0.1C_b ⁽²⁾
300
0.6
0.6
t_su(SP)
STOP condition setup time
4
0.6
t_w(SP:SR)
Bus free time between STOP
and START condition
4.7
1.3
1. SCL (SCL_A/G pin), SDA (SDA_A/G pin).
2. C_b = total capacitance of one bus line, in pF
Unit
kHz
μs
ns
μs
ns
μs
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Figure 4. I²C slave timing diagram
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Note:
WK67 WZ6&//
WZ6&/+
WU6&/
WI6&/
Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both ports.
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DocID023426 Rev 3
17/75
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