LSM330 Datasheet, PDF (44/75 Pages) STMicroelectronics – Power-down and sleep modes

Register description
8.3
CTRL_REG5_A (20h)
Linear acceleration sensor control register 5 (r/w)
ODR3
ODR2
Table 21. CTRL_REG5_A register
ODR1
ODR0
BDU
ZEN
LSM330
YEN
XEN
ODR [3:0]
BDU
Zen
Yen
Xen
Table 22. CTRL_REG5_A register description
Output data rate & power mode selection. Default value:0000 (see Table 23)
Block Data Update. Default value: 0
0:continuous update,1:output registers not updated until MSB and LSB read
Z-axis enable. Default value: 1
(0: Z-axis disabled; 1: Z-axis enabled)
Y-axis enable. Default value:1
(0:Y axis disabled; 1: Y-axis enabled)
X-axis enable. Default value:1
(0: X-axis disabled;1: X-axis enabled)
ODR [3:0] is used to set power mode, ODR selection. The following table lists all
frequencies available.
ODR3
0
0
0
0
0
0
0
0
1
1
Table 23. CTRL_REG5_A output data rate selection
ODR2
ODR1
ODR0
ODR selection
0
0
0
Power-down
0
0
1
3.125 Hz
0
1
0
6.25 Hz
0
1
1
12.5 Hz
1
0
0
25 Hz
1
0
1
50 Hz
1
1
0
100 Hz
1
1
1
400 Hz
0
0
0
800 Hz
0
0
1
1600 Hz
The BDU bit is used to inhibit the update of the output registers until both upper and lower
registers are read. In default mode (BDU=’0’) the output register values are updated
continuously. If for any reason it is not sure to read faster than the output data rate it is
recommended to set the BDU bit to ‘1’. In this way the content of output register is not
updated until both MSB and LSB are read, avoiding to read values related to different
sample times.
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