M36DR432A Datasheet, PDF (25/46 Pages) STMicroelectronics – 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product

M36DR432A, M36DR432B
Symbol Parameter
Device
Test Condition
Min Typ Max Unit
V_PPL
Program Voltage
(Program or
Erase operations)
Flash
1.65
3.6
V
V_PPH
Program Voltage
(Program or
Erase operations)
Flash
11.4
12.6
V
Program Voltage
V_PPLK (Program and
Erase lock-out)
Flash
1
V
V_LKO
V_DDF Supply
Voltage (Program
and Erase lock-
out)
Flash
2
V
Note: 1. I_DDES and I_DDWS are specified with device deselected. If device is read while in erase suspend, current draw is sum of I_DDES
and I_DDR. If the device is read while in program suspend, current draw is the sum of I_DDWS and I_DDR.
Table 25. Flash Read AC Characteristics
(TA = –40 to 85°C; V_DDF = 1.65V to 2.2V)
Flash
Symbol Alt
Parameter
Test Condition
100
120
Min Max Min Max
t_AVAV
t_RC
Address Valid to Next Address
Valid
EF = V_IL, GF = V_IL 100
120
t_AVQV
t_ACC
Address Valid to Output Valid
(Random)
EF = V_IL, GF = V_IL
100
120
t_AVQV1
t_PAGE
Address Valid to Output Valid
(Page)
EF = V_IL, GF = V_IL
35
45
t_AXQX
t_OH
Address Transition to Output
Transition
EF = V_IL, GF = V_IL
0
0
t_EHQX
t_OH
Chip Enable High to Output
Transition
GF = V_IL
0
0
t_EHQZ ⁽¹⁾
t_HZ Chip Enable High to Output Hi-Z
GF = V_IL
25
35
t_ELQV ⁽²⁾
t_CE Chip Enable Low to Output Valid
GF = V_IL
100
120
t_ELQX ⁽¹⁾
t_LZ
Chip Enable Low to Output
Transition
GF = V_IL
0
0
t_GHQX
t_OH
Output Enable High to Output
Transition
EF = V_IL
0
0
t_GHQZ ⁽¹⁾
t_DF
Output Enable High to Output
Hi-Z
EF = V_IL
25
35
t_GLQV ⁽²⁾
t_OE
Output Enable Low to Output
Valid
EF = V_IL
25
35
t_GLQX ⁽¹⁾
t_OLZ
Output Enable Low to Output
Transition
EF = V_IL
0
0
Note: 1. Sampled only, not 100% tested.
2. GF may be delayed by up to tELQV - tGLQV after the falling edge of EF without increasing tELQV
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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