83C795 Datasheet, PDF (87/136 Pages) List of Unclassifed Manufacturers – Ethernet System Controller

83C795
LAN CONTROLLER OVERVIEW
7.5 TRANSMITTER NETWORK INTERFACE
(MAC-TO-PHY)
7.5.1 Oscillator
A 20 Mhz parallel res onant crys tal can be
connected between pins X1 and X2; or an external
clock can be connected at X1. T he oscillator’s 20
Mhz output is dividedin half internally toprovidethe
clock s ignals for the encoding and decoding
circuits. Operation at s erial datarates other than 10
MHz requires an externally-s uppliedclock sincethe
os cillator is only tuned for 20 MHz. T he IE E E 802.3
s tandard requires 0.01% abs olute accuracy on the
trans mitted s ignal frequency; however, s tray
capacitance can s hift the crys tal’s frequency out of
range caus ing it to exceed the 0.01 tolerance.
7.5.2 Manchester Encoder
Data encoding and trans mis s ion begin when the
internal trans mit enable s ignal from the L AN
controller goes high and continues as long as it
remains high. T rans mis s ion ends when the
T ransmit E nables ignal goes low. T helast trans ition
occurs at the center of the bit cell if the las t bit is ’1’
or at the boundary of the bit cell if the las t bit is ’0’.
7.5.3 AUI Differential Driver
T heAUI differential linedriver has theability todrive
up to 50 meters of twis ted-pair AUI/E thernet
tr ans cei ver cabl e. T hes e dr iver s pr ovi de
emitter-coupled logic (E CL) level s ignals . T he
outputs cons is t of current drivers that mus t be
loaded with external 150Ω pull-up resistors . T he
interface can be programmed to operate in either
half-step or full-s tep mode in the idle state. T his is
done via the S E L bit in the MANCH R egis ter. In
full-s tep mode, T X+ is positive in relation to T X-
when idle. In half-step mode, T X+ and T X- are
equal, res ulting in nearly zero differential output
voltage.
By settingabit in theMANCH R egister, Manches ter
encoder /decoder l ogi c can be bypas s ed
completely. E xternal circuitry s hould drive XT XC,
XR XC, XCR S , XR XD, and XCOL pins.
7.5.4 Collision Translator
When the 83C795 is us ed as an AUI device, a
s eparate E thernet trans ceiver (MAU) detects
collis ions on the coaxial cable and generates a 10
Mhz s ignal which is monitored by the 83C795
through the collis ion detect pins (CD+, CD-). T he
pres ence of this s ignal activates the internal
collis ion detect s ignal (CD) connected to the LAN
controller. T he collis ion detect s ignal is deactivated
within 160 ns ec after the abs ence of the 10 Mhz
s ignal.
With the s tandard 78Ω trans ceiver AUI cable, the
CD+/CD- differential input pair mus t be externally
terminated. T his requirement may be s atis fied by
connecting two 39Ω res is tors in s eries with one
optional common mode bypas s capacitor.
When 83C795 is us edin twis ted-pair configuration,
thecollis ion is generatedif theManches ter decoder
detects carrier while the trans mit enable is active.
7.5.5 Twisted-Pair Differential Driver
T he T P Driver can trans mit through up to 100
meters of uns hielded twis ted pair cable. T he driver
includes a circuit for trans mit equalization which
attenuates the trans mit waveform’s low-frequency
components . T his reduces the received signal’s
zero-cros s ing jitter and makes the receiver design
s impler.
In the trans mitter, phas e compens ation is us ed to
reducejitter. T his is accomplis hedby us ingexternal
res is tors to determine the drive s trength during the
s econd half of a double-width puls e as compared
to the drive s trength of the firs t half. T here are two
pairs of twis ted-pair trans mit drivers : T PX1 and
T PX2. T PX2 is a much weaker driver than T PX1.
During the firs t half-bit-time of each puls e, both
pairs of drivers driveout theencodedtrans mit data.
If thepulseis afull-bit-timein length, T PX2 s witches
polarity duringthes econdhalf of thepuls eandacts
to reduce the amplitude of the trans mitted s ignal.
As implifiedexample of external trans mit circuitry is
s hown in F igure 7-3.
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