83C795 Datasheet, PDF (81/136 Pages) List of Unclassifed Manufacturers – Ethernet System Controller

83C795
LAN CONTROLLER OVERVIEW
7.2 FIFOS
T here are two F IF O s tructures us edtoexpeditethe
trans fer proces s between the DMA process or and
the T rans mit/R eceive units. E ach F IF O is 16-bytes
deep. As s ociated with each F IF O are up/down
counters that keep track of how full each F IF O is .
T he normal loading s ource for each F IF O receives
an overflow indication when it occurs and the
normal unloading des tination has an empty signal
to prevent drawing of nonexis tent data.
7.3 RECEIVER NETWORK INTERFACE
(PHY-TO-MAC)
T his s ection of the 83C795 has s quelched,
differential receivers for the AU I and T WP
interfaces . T he inputs from thes e interfaces are
multiplexed together with a feedback path to a
common phas e-locked-loop circuit for clock
recovery and data decoding. F igure 7-2 s hows the
AUI and T wis ted-Pair interface relations hip.
FIGURE 7-2. AUI/TWISTED-PAIR INTERFACE
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