83C795 Datasheet, PDF (31/136 Pages) List of Unclassifed Manufacturers – Ethernet System Controller

83C795
ETHERNET SYSTEM CONTROLLER REGISTERS
5.1.8 REV/IOPA - Revision/I/O Pipe Address
Register
R ead/Write Port = 07
T his regis ter serves two functions :
1. It provides the host with revision information
about the chip (CHIP3-0 and REV3-0).
2. It provides a port for loading the I/O pipe
address into the buffer counter. For more on
this, see Section 6.2.
T he revis ion information is read-only and will be
returned on reads to this location when the IOPAV
bit (ICR .5) is zero. T his information is detailed as
follows :
BIT
REV READ
7 CHIP3
6 CHIP2
5 CHIP1
4 CHIP0
3 REV3
2 REV2
1 REV1
0 REV0
RESET
0
1
0
0
0
0
0
0
Bits 7-4: CHIP3-CHIP0, Chip Type
Depending on the condition of Jumper 9, this field
yields either 0100 or 0010. A value of 0100 indi-
cates to the hos t that this is an 83C795 device; a
value of 0010 indicates an 83C790 device.
Bits 3-0: REV3-REV0, Revision Number
T hesebits initializetotherevision number of this chip.
When theI/Opipeis enabled– that is , when IOPE N
is s et (ICR .4) – the I/O pipe addres s is loaded into
the buffer counter through this regis ter. S ince the
buffer counter is 16-bits wide, two cons ecutive
writes are required to accomplis h this us ing this
method.
• The first write, which contains the lower byte of
the address, is stored in a temporary register.
• The second write, which contains the upper
byte of the address, is then transferred, along
with the contents of the temporary register, into
the buffer counter.
Any hos t access to the chip between the first and
s econd writes will automatically res et the proces s .
When IOPAV is s et, the contents of the temporary
regis ter can be read from this location.
BIT
7 IOPA7
6 IOPA6
5 IOPA5
4 IOPA4
3 IOPA3
2 IOPA2
1 IOPA1
0 IOPA0
IOPA
RESET
0
0
1
0
0
0
1
0
Bits 7-0: IOPA7-IOPA0, I/O Pipe Address
T his regis ter provides the location of the I/O Pipe
address .
5.1.9 LAN0 - LAN5 - LAN Address Registers
R ead/Write Ports = 08 - 0D S WH = 0
T hes e s ix LAN addres s registers (along with the
B DID and CHKS UM regis ters ) recall or s tore
general-purposedatafromtheE E R OM and, during
normal use, recall the permanently-as s igned LAN
addres s for the adapter.
REG
LN
RESET INIT RECALL
LAN0 LN07-LN00 0
EE EE
LAN1 LN15-LN08 0
EE EE
LAN2 LN23-LN16 0
EE EE
LAN3 LN31-LN24 0
EE EE
LAN4 LN39-LN32 0
EE EE
LAN5 LNMSB,
0
LN46-LN40
EE EE
Bits 0-7: LN07-LN00
In normal use, thes e are the leas t s ignificant bits of
the globally-as signed LAN addres s block.
Bits 8-15: LN08-LN15
In normal us e, LN8-LN15 are part of the globally
as signed LAN addres s block.
Bits 16-23: LN16-LN23
In normal use, LN16-LN23 are part of the globally
as signed LAN addres s block.
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