83C795 Datasheet, PDF (49/136 Pages) List of Unclassifed Manufacturers – Ethernet System Controller

83C795
ETHERNET SYSTEM CONTROLLER REGISTERS
5.2.35 TBEGIN - Transmit Buffer Starting
Address Register
Linked-List Map R ead Port = 2:13
Linked-List Map Write Port = 0:15
T his register holds the upper 8 bits of the s tarting
address of the transmit buffer des criptor table. T he
lower 8 bits are as sumed to be zero. R efer to page
80 for more information.
BIT
7 TB15
6 TB14
5 TB13
4 TB12
3 TB11
2 TB10
1 TB09
0 TB08
TBEGIN
RESET
X
X
X
X
X
X
X
X
5.2.36 TCNTH - Transmit Frame Length High
Register
Normal Map R ead Port = 2:16 Normal Map Write
Port = 0:16
T his regis ter contains the upper 8 bits of a
two-regis ter set that holds the byte count for the
frame to be trans mitted. T his byte count mus t
include the DA, S A, and data fields . If CR C
generation is inhibited, this count mus t als o include
the CR C field in the buffer.
5.2.37 TCNTL - Transmit Frame Length Low
Register
Normal Map R ead Port = 2:13 Normal Map Write
Port = 0:15
T his regis ter contains the lower 8 bits of a
two-regis ter set that holds the byte count for the
frame to be trans mitted. T his byte count mus t
include the DA, S A, and data fields . If CR C
generation is inhibited, this count mus t als o include
the CR C field in the buffer.
BIT
7 L07
6 L06
5 L05
4 L04
3 L03
2 L02
1 L01
0 L00
TCNTL
RESET
X
X
X
X
X
X
X
X
5.2.38 TCON - Transmit Configuration
Register
Normal Map R ead Port = 2:1D Normal Map Write
Port = 0:1D
Linked-List MapR eadPort = 2:1D Linked-List Map
Write Port = 0:1D
T his regis ter controls loopback options and
trans mitter mode operations .
BIT
7 L15
6 L14
5 L13
4 L12
3 L11
2 L10
1 L09
0 L08
TCNTH
RESET
X
X
X
X
X
X
X
X
BIT
70
60
50
40
30
2 LB1
1 LB0
0 CRCN
TCON
RESET
0
0
0
0
0
0
0
0
Bits 2-1: LB1, LB0, Loopback Test Selection
T hes etwobits aredecodedas s hown in Table5-12.
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