83C795 Datasheet, PDF (67/136 Pages) List of Unclassifed Manufacturers – Ethernet System Controller

83C795
HOST INTERFACE SECTION
6.7.2 Retrieval And Storage Of Host
Configuration Registers
6.7.2.1 EEROM Interface Overview
An external 9356 s erial E E R OM is us ed to s tore up
to 256 bytes of data. It takes about 2 ms to read all
16 regis ters after the endof the res et puls e. It takes
about 200 ms to s tore the E E R OM. T he LAN
Controller s houldnot beonline (trans mittingor able
to receive) while E E R OM recall or s tore operations
are ongoing, nor s hould any of the regis ters in the
L AN controller or hos t interface s ection be
acces s ed during that time. Unpredictable res ults
may occur becaus e the internal databus s es will be
s upporting the data movement to or from the
E E R OM during that time interval.
An exception to this rule is made in the cas e of the
E E R regis ter, which may be polled to determine
when therecall or s toreoperation completes . When
the E E R regis ter is read, the E E R .S T O and
E E R .R C bits are vis ible to the hos t. Other bits from
that regis ter are meaningful only when there is no
ongoing E E R OM operation.
All 256 bytes of E E R OM can be written to andread
from. T hey are readinto the LAN Addres s regis ters
8 bytes at atime. Once there, they can be changed
and stored.
T he E E R OM controller can be operated under
program control to do partial retrievals from and
s ave configuration data into the E E R OM.
E E R OMs have a limited number of s torage cycles .
T he s tore operation s hould only take place at initial
board configuration or at initial ins tallation in a
customer’s computer.
6.7.2.2 EEROM Recall Operation Details
All recalls fromE E R OMintohos t interfaceregis ters
are made in groups of either 8 or 16 regis ters . T he
choices are programmed into the E E R register in
the host interface s ection according to Table 6-3.
Reset Recall
Action
0
0 No Recall
0
1 Recall from bank ’EA’ into LAN
ADDR registers
1
X Recall from bank ’6’ into LAN
ADDR registers and from bank
’INIT’ into configuration registers.
TABLE 6-3. EEROM RECALL OPERATIONS
T he recall of hos t interface configuration regis ters
(addres s es 08-0F h, S WH=1) are done from the
bank s electedby 4 INIT jumpers . Table6-4 defines
which bank of configuration regis ters corresponds
to each arrangement of the INIT pins .
INIT: Bank
MA3-0
Notes
0000 NONE All pins jumpered to ground. This
is the bypass condition.
0001 14
0010 13
0011 12
0100 11
0101 10
0110 9
0111 8
1000 7
1001 6 _{Initial recall defaults:}
I/O = 280h
ROM= disabled at C0000h
RAM = 8K at C8000h
INT = 0 (no interrupt mapped)
LIT = disabled, GPOUT = 0
1010
1011
1100
1101
1110
1111
Configuration Registers (IAR,
RAR, BIO, GCR, GCR2) are
not recalled after this RESET.
5
4
3
2
1
0 No jumpers are attached to pins.
TABLE 6-4. CONFIG REGISTER/INIT PINS
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