COM20020I_0609 Datasheet, PDF(32/69 Page) SMSC Corporation – 5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM

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COM20020I_0609 Datasheet, PDF (32/69 Pages) SMSC Corporation – 5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM

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5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM

BIT

BIT NAME

5 Transmit Enable

4,3 Extended

Timeout 1,2

2 Backplane

1,0 Sub Address 1,0

SYMBOL

TXEN

ET1, ET2

DESCRIPTION

When low, this bit disables transmissions by keeping

nPULSE1, nPULSE2 if in non-Backplane Mode, and nTXEN

pin inactive. When high, it enables the above signals to be

activated during transmissions. This bit defaults low upon

reset. This bit is typically enabled once the Node ID is

determined, and never disabled during normal operation.

Please refer to the Improved Diagnostics section for details on

evaluating network activity.

These bits allow the network to operate over longer distances

than the default maximum 2 miles by controlling the

Response, Idle, and Reconfiguration Times. All nodes

should be configured with the same timeout values for proper

network operation. For the COM20020I 3V with a 20 MHz

crystal oscillator, the bit combinations follow:

BACK-

PLANE

SUBAD

1,0

Reconfig

Response Idle Time Time (mS)

ET2

ET1 Time (Î¼S) (Î¼S)

840

596.6

656

840

298.4

328

840

149.2

164

420

37.4

Note: These values are for 5Mbps and RCNTMR[1,0]=00.

Reconfiguration time is changed by the RCNTMR1 and

RCNTMR0 bits.

A logic "1" on this bit puts the device into Backplane Mode

signaling which is used for Open Drain and Differential Driver

interfaces.

These bits determine which register at address 07 may be

accessed. The combinations are as follows:

SUBAD1

SUBAD0 Register

0 Tentative ID

1 Node ID

0 Setup 1

1 Next ID