SI5369 Datasheet, PDF (64/84 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5369
Register 136.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name RST_REG ICAL
Type
R/W
R/W
R
R
R
R
R
R
Reset value = 0000 0000
Bit
Name
Function
7
RST_REG RST_REG.
Internal Reset.
0: Normal operation.
1: Reset of all internal logic. Outputs tristated or disabled during reset.
6
ICAL
ICAL.
Start an Internal Calibration Sequence.
For proper operation, the device must go through an internal calibration sequence. ICAL
is a self-clearing bit. Writing a one to this location initiates an ICAL. The calibration is
complete once the LOL alarm goes low. A valid stable clock (within 100 ppm) must be
present to begin ICAL.
Note: Any divider, CLKINn_RATE or BWSEL_REG changes require an ICAL to take effect.
Changes in SFOUTn_REG, PD_CKn, or DSBLn_REG will cause a random change in skew
until an ICAL is completed.
0: Normal operation.
1: Writing a "1" initiates internal self-calibration. Upon completion of internal self-
calibration, ICAL is internally reset to zero.
5:0 Reserved
64
Rev. 1.0