SI5369 Datasheet, PDF (14/84 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5369
Table 5. Jitter Generation
Parameter Symbol
Jitter Gen
OC-192
JGEN
Test Condition^*
Min
Measurement
Filter
DSPLL
BW²
0.02–80 MHz 120 Hz —
—
Typ Max
GR-253-
Unit
Specification
4.2
—
30
ps_PP
.27
—
N/A
ps_rms
4–80 MHz
120 Hz —
3.7
—
10
ps_PP
—
.14
—
N/A
ps_rms
0.05–80 MHz 120 Hz —
4.4
—
10
ps_PP
—
.26
—
1.0
ps_rms
Jitter Gen
JGEN
0.12–20 MHz 120 Hz —
3.5
—
40.2
ps_PP
OC-48
—
.27
—
4.02
ps_rms
*Note: Test conditions:
1. fIN = fOUT = 622.08 MHz
2. Clock input: LVPECL
3. Clock output: LVPECL
4. PLL bandwidth: 120 Hz
5. 114.285 MHz 3rd OT crystal used as XA/XB input
6. V_DD = 2.5 V
7. T_A = 85 °C
8. Jitter integration bands include low-pass (-20 dB/dec) and high-pas (-60 dB/dec) roll-offs per Telecordia GR-253-
CORE.
14
Rev. 1.0