SI5369 Datasheet, PDF (31/84 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5369
Register 7.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
SFOUT5_REG [2:0]
FOSREFSEL [2:0]
Type
R
R
R/W
R/W
Reset value = 0010 1010
Bit
Name
Function
7:6
Reserved.
5:3 SFOUT5_REG [2:0] SFOUT5_REG [2:0]
Controls output signal format and disable for CKOUT5 output buffer. The
LVPECL and CMOS output formats draw more current than either LVDS or CML;
however, there are restrictions in the allowed output format pin settings so that
the maximum power dissipation for the TQFP devices is limited when they are
operated at 3.3 V. When there are four enabled LVPECL or CMOS outputs, the
fifth output must be disabled. When there are five enabled outputs, there can be
no more than three outputs that are either LVPECL or CMOS.
000: Reserved
001: Disable
010: CMOS
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
2:0 FOSREFSEL [2:0] FOSREFSEL [2:0].
Selects which input clock is used as the reference frequency for Frequency Off-
Set (FOS) alarms.
000: XA/XB (External reference)
001: CKIN1
010: CKIN2
011: CKIN3
100: CKIN4
101: Reserved
110: Reserved
111: Reserved
Rev. 1.0
31