SI5369 Datasheet, PDF (34/84 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5369
Register 10.
Bit D7
Name
D6
D5
D4
D3
D2
D1
D0
DSBL5_REG Reserved DSBL4_REG DSBL3_REG DSBL2_REG DSBL1_REG
Type R
R
R/W
R
R/W
R/W
R
R
Reset value = 0000 0000
Bit
Name
Function
7:6
Reserved
5
DSBL5_REG DSBL5_REG.
This bit controls the powerdown and disable of the CKOUT5 output buffer. If disable
mode is selected, the NC5_LS output divider is also powered down.
0: CKOUT5 enabled.
1: CKOUT5 disabled.
4
Reserved
3
DSBL4_REG DSBL4_REG.
This bit controls the powerdown and disable of the CKOUT4 output buffer. If disable
mode is selected, the NC4 output divider is also powered down.
0'b=CKOUT4 enabled
1'b=CKOUT4 disabled
2
DSBL3_REG DSBL3_REG.
This bit controls the powerdown and disable of the CKOUT3 output buffer. If disable
mode is selected, the NC3 output divider is also powered down.
0: CKOUT3 enabled
1: CKOUT3 disabled
1
DSBL2_REG DSBL2_REG.
This bit controls the powerdown and disable of the CKOUT2 output buffer. If disable
mode is selected, the NC2 output divider is also powered down.
0: CKOUT2 enabled
1: CKOUT2 disabled
0
DSBL1_REG DSBL1_REG.
This bit controls the powerdown and disable of the CKOUT1 output buffer. If disable
mode is selected, the NC1 output divider is also powered down.
0: CKOUT1 enabled
1: CKOUT1 disabled
34
Rev. 1.0