SI5324C-C-GM Datasheet, PDF(6/72 Page) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

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SI5324C-C-GM Datasheet, PDF (6/72 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

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Si5324

Table 2. DC Characteristics (Continued)

(VDD = 1.8 Â± 5%, 2.5 Â±10%, or 3.3 V Â±10%, TA = â40 to 85 Â°C)

Parameter

Symbol

Output Clocks (CKOUTn)3,5

Test Condition

Min

Typ

Max

Unit

Common Mode

CKOVCM

Differential Output

Swing

Single Ended Output

Swing

Differential Output

Voltage

Common Mode Output

Voltage

Differential Output

Voltage

CKOVD

CKOVSE

CKOVD

CKOVCM

CKOVD

Common Mode Output CKOVCM

Voltage

Differential Output

Resistance

CKORD

Output Voltage Low

CKOVOLLH

LVPECL 100 ï load line-

to-line

LVPECL 100 ï load line-

to-line

LVPECL 100 ï load line-

to-line

CML 100 ï load line-to-

line

CML 100 ï load line-to-

line

LVDS

100 ï load line-to-line

Low Swing LVDS

100 ï load line-to-line

LVDS 100 ïï load line-to-

line

CML, LVPECL, LVDS

CMOS

VDD â

1.42

1.1

0.5

350

500

350

1.125

425

VDD-0.36

700

425

1.2

200

VDD â1.25

1.9

0.93

500

900

500

1.275

0.4

VPP

mVPP

Output Voltage High CKOVOHLH

VDD = 1.71 V

0.8 x

CMOS

VDD

Notes:

1. Current draw is independent of supply voltage

2. No under- or overshoot is allowed.

3. LVPECL outputs require nominal VDD â¥ 2.5 V.

4. This is the amount of leakage that the 3-Level inputs can tolerate from an external driver. See Si53xx Family Reference

Manual for more details.

5. LVPECL, CML, LVDS and low-swing LVDS measured with Fo = 622.08 MHz.

Rev. 1.0

▷