SI5324C-C-GM Datasheet, PDF (16/72 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

Si5324
2. Typical Application Circuits
VDD = 3.3 V
System
Power
Supply
Ferrite
Bead
130 
82 
130 
82 
CKIN1+
CKIN1–
Input
Clock
Sources*
VDD = 3.3 V
130 
130 
CKIN2+
C4 1 µF
C1 0.1 µF
C2 0.1 µF
C3 0.1 µF
CKOUT1+
CKOUT1–
CKOUT2+
CKOUT2–
0.1 µF
+
100 
–
0.1 µF
0.1 µF
+
100 
–
0.1 µF
Clock Outputs
82 
82 
CKIN2–
Option 1:
114.285 MHz Crystal
Crystal/Ref Clk Rate
Option 2:
Refclk+
Refclk–
Control Mode (L)
XA
VDD
15 k
15 k
XB
RATE[1:0]²
0.1 µF
XA
0.1 µF
XB
CMODE
Si5324
INT_C1B
C2B
LOL
A[2:0]
SDA
SCL
CS_CA
Interrupt/CKIN_1 Invalid Indicator
CKIN_2 Invalid Indicator
PLL Loss of Lock Indicator
Serial Port Address
Serial Data
I2C Interface
Serial Clock
Clock Select/Clock Active
Reset
RST
Notes: 1. Assumes differential LVPECL termination (3.3 V) on clock inputs.
2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).
Figure 3. Si5324 Typical Application Circuit (I²C Control Mode)
16
Rev. 1.0