SI5324C-C-GM Datasheet, PDF (17/72 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

Si5324
VDD = 3.3 V
System
Power
Supply
130 
130 
Ferrite
Bead
82 
82 
CKIN1+
CKIN1–
Input
Clock
Sources*
VDD = 3.3 V
130 
130 
C4 1 µF
C1 0.1 µF
C2 0.1 µF
C3 0.1 µF
CKOUT1+
CKOUT1–
CKOUT2+
CKOUT2–
0.1 µF
+
100 
–
0.1 µF
0.1 µF
+
100 
–
0.1 µF
Clock Outputs
CKIN2+
82 
82 
CKIN2–
INT_C1B
Si5324
C2B
Interrupt/CLKIN_1 Invalid Indicator
CLKIN_2 Invalid Indicator
Option 1:
114.285 MHz Crystal
Crystal/Ref Clk Rate
Option 2:
Refclk+
Refclk–
Control Mode (H)
Reset
XA
LOL
PLL Loss of Lock Indicator
VDD
15 k
15 k
XB
RATE[1:0]²
0.1 µF
XA
0.1 µF
XB
SS
SDO
SDI
SCLK
Slave Select
Serial Data Out
Serial Data In
Serial Clock
SPI Interface
CMODE
RST
CS_CA
Clock Select/Clock Active
Notes: 1. Assumes differential LVPECL termination (3.3 V) on clock inputs.
2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).
Figure 4. Si5324 Typical Application Circuit (SPI Control Mode)
Rev. 1.0
17