SI5324C-C-GM Datasheet, PDF (28/72 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

Si5324
Register 4.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name AUTOSEL_REG [1:0]
HIST_DEL [4:0]
Type
R/W
R
R/W
Reset value = 0001 0010
Bit
Name
Function
7:6 AUTOSEL_ AUTOSEL_REG [1:0].
REG [1:0] _{Selects method of input clock selection to be used.}
00: Manual (either register or pin controlled, see CKSEL_PIN)
01: Automatic Non-Revertive
10: Automatic Revertive
11: Reserved
5
Reserved Reserved.
4:0 HIST_DEL HIST_DEL [4:0].
[4:0]
Selects amount of delay to be used in generating the history information used for Digital
Hold.
Register 5.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
ICMOS [1:0]
Type
R/W
R
R
R
R
R
R
Reset value = 1110 1101
Bit
Name
Function
7:6 ICMOS [1:0] ICMOS [1:0].
When the output buffer is set to CMOS mode, these bits determine the output buffer drive
strength. The first number below refers to 3.3 V operation; the second to 1.8 V operation.
These values assume CKOUT+ is tied to CKOUT-.
00: 8mA/2mA.
01: 16mA/4mA
10: 24mA/6mA
11: 32mA/8mA
5:0 Reserved Reserved.
28
Rev. 1.0