SI5324C-C-GM Datasheet, PDF (58/72 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

Si5324
5.1. ICAL
The device's registers must be configured for the intended applications. After the part is configured, the part must
perform a calibration procedure when there is a stable clock on the selected CLKINn input. The calibration process
is triggered by writing a "1" to bit D6 in register 136. See the Family Reference Manual for details. In addition, after
a successful calibration operation, changing any of the Registers indicated in Table 12 requires that a calibration be
performed again by the same procedure (writing a "1" to bit D6 in register 136).
Table 12. ICAL-Sensitive Registers
Address
0
0
1
1
2
4
5
7
9
10
10
11
11
19
19
19
19
25
31
34
40
40
43
46
55
55
Register
BYPASS_REG
CKOUT_ALWAYS_ON
CK_PRIOR1
CK_PRIOR2
BWSEL_REG
HIST_DEL
ICMOS
FOSREFSEL
HIST_AVG
DSBL1_REG
DSBL2_REG
PD_CK1
PD_CK2
FOS_EN
FOS_THR
LOCKT
VALTIME
N1HS
NC1_LS
NC2_LS
N2_HS
N2_LS
N31
N32
CLKIN1RATE
CLKIN2RATE
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Rev. 1.0