SI53307 Datasheet, PDF (18/30 Pages) Silicon Laboratories – 2:2 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR

Si53307
DC-coupled LVDS and Low-Power LVPECL Termination
VDDO = 3.3 V, 2.5 V, or 1.8 V (LVDS only)
VDD
Si533xx
Q
50
Qn
50
LVDS
Receiver
100
AC-coupled LVDS and Low-Power LVPECL Termination
VDDO = 3.3 V or 2.5 V or 1.8 V (LVDS only)
Si533xx
Q
50
Qn
50
0.1 uF
0.1 uF
50
VDD
50
LVDS
Receiver
AC-coupled CML Termination
VDDO _{= 3.3 V or 2.5 V or 1.8 V}
Si533xx
Q
Qn
0.1 uF
50
100
50
0.1 uF
VDD
CML
Receiver
DC-coupled HCSL Receiver Termination
VDDO = 3.3 V
Si533xx
Q
50
Qn
50
50
50
VDD
Standard
HCSL
Receiver
DC-coupled HCSL Source Termination
VDDO = 3.3 V
42.2
Si533xx
Q
50
Qn
42.2
50
86.6
86.6
VDD
Standard
HCSL
Receiver
Figure 8. LVDS, CML, HCSL, and Low-Power LVPECL Output Termination
18
Rev. 1.0