K3S7V2000M-TC Datasheet, PDF (7/27 Pages) Samsung semiconductor – 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM

K3S7V2000M-TC
MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with MRS
Address
Function
A6
RAS Latency
A5
A4
A3
CAS Latency
A2
Burst Type
Synch. MROM
A1
A0
Burst Length
RAS Latency
A6 Length A5
CAS Latency
A4
A3
Length
Burst Type
A2 Type
Burst Length
A1
A0
Length
0
1
0
0
0
Reserved
0 Sequential 0
0
Reserved
1
2
0
0
1
Reserved
1 Interleave 0
1
4
0
1
0
3
1
0
8
0
1
1
4
1
1
Reserved
1
0
0
5
1
0
1
6
1
1
0
Reserved
1
1
1
Reserved
Notes :
-. After power up, when user wants to change mode register set, user must exit from power down mode
and start mode register set before entering normal operation mode.
ADDRESSING MAP
(1) WORD = "H" : x32 Organization
Function
A0
A1
A2
Row Address
RA0 RA1 RA2
Column Address CA0 CA1 CA2
Note : Column Address MSB (at x32 organization)
A3
RA3
CA3
A4
RA4
CA4
A5
RA5
CA5
A6
RA6
CA6
A7
RA7
CA7^Note
A8
RA8
X
A9
RA9
X
A10
RA10
X
A11
RA11
X
A12
RA12
X
(X=Don't Care)
(2) WORD="L" : x16 Organization
Function
A0
A1
A2
Row Address
RA0 RA1 RA2
Column Address CA0 CA1 CA2
Note : Column Address MSB (at x16 organization)
A3
RA3
CA3
A4
RA4
CA4
A5
RA5
CA5
A6
RA6
CA6
A7
RA7
CA7
A8
RA8
CA8^Note
A9
RA9
X
A10
RA10
X
A11
RA11
X
A12
RA12
X
(X=Don't Care)
(3) Each address is arranged as follows
for X32 operation,
MSB
Address Register AR20 AR19 AR18 ... AR9 AR8 AR7 AR6 ...
AR3 AR2
LSB
AR1 AR0
Address
RA12 RA11 RA10 ... RA1 RA0 CA7 CA6 ... CA3 CA2 CA1 CA0
* Initial Address
BL=4
- BL=4(CA0,CA1)
- BL=8(CA0,CA1,CA2) _BL=8
for X16 operation,
when CA8 is set to Low, data belonging to 0~15th registers are output to Q0~Q15 pins, and when CA8 is set to High, data belonging
to16~31th registers are output to Q0~Q15 pins.