K3S7V2000M-TC Datasheet, PDF (6/27 Pages) Samsung semiconductor – 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM

K3S7V2000M-TC
CAPACITANCE(TA=25°C, f=1MHz)
Parameter
Input Capacitance
Output Capacitance
Symbol
Min
CIN
-
COUT
-
Synch. MROM
Max
Unit
5
pF
7
pF
FUNCTION TRUTH TABLE
Command
CKEn-1 CKEn CS RAS CAS MR DQM Add. WORD Notes
Register
Mode Register Set
H
X
L
L
L
L
X Code
X
1
Row Active
Row Access & Latch
Row Access& Latch
H
X
L
L
H
H
X
RA
X
Read
Column Access & Latch
H
X
L
H
L
H
X
CA
X
Burst Stop
(Burst Stop on Synch.DRAM)
(Precharge on Synch.DRAM)
H
X
L
H
H
L
X
X
X
H
X
L
L
H
L
X
X
X
Power Down &
Clock Suspend
Entry
H
Two Standby Mode
Exit
L
L
XXXXX
H
XXX
X
X
X
X
X
2
X
DQM
H
X
V
X
3
Illegal
(Write on Synch.DRAM)
(Refresh on Synch.DRAM)
H
X
L
H
L
L
X
CA
X
H
X
L
L
L
H
X
X
X
No Operation Command
H
X
HXX X X
X
H
X
L HH H X
X
X
4
X
Organization Control
H
H
X
L
H
L
H
X
CA
5
L
(V=Valid, X=Don't Care, H=Logic High, L=Logic Low)
Abbreviations (RA: Row Address, CA: Column Address, NOP: No Operation Command, DWM: Double Word Mode, WM: Word Mode)
Notes :
1. A0 ~ A6: Program keys (@MRS). After power up, mode register set, can be set before issuing other input command. After the mode register set com-
mand is completed, no new commands can be issued for 3 CLK Cycles, and CS or MR state must be defined "H" within 3 CLK cycles. Refer to the
Mode Register Field Table
2. In the case CKE is low, two standby modes are possible. Those are stand-by mode in power-down.
Power Down: CKE="L" (at all the parts except the range of Row Active, Read & Data out)
Clock Suspend: CKE="L" (at the range of Row Active, Read & Data Out)
3. DQM sampled at rising edge of a CLK makes a Hi-Z state the data-out state, delayed by 2CLK cycles.
4. Precharge command on Synch.DRAM can be used for Burst Stop operation during burst read operation only.
5. Mode selection control is decided simultaneously with column access start, and according to the polarity of WORD pin, "H" state is DWM,
"L" state is WM.