K3S7V2000M-TC Datasheet, PDF (3/27 Pages) Samsung semiconductor – 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM

K3S7V2000M-TC
Synch. MROM
PIN FUNCTION DESCRIPTION
PIN
CLK
CS
NAME
System Clock
Chip Select
INPUT FUNCTION
Active on the rising edge to sample all inputs.
Disables or enables device operation by masking or enabling all inputs except
CLK and CKE.
CKE
Clock Enable
A0 ~ A12
Address
Masks system clock to freeze operation from the next clock cycle. CKE should be
enabled at least one cycle prior to new command. Disables input buffers for power down
in standby mode.
Row / Column addresses are multiplexed on the same pins.
Row address: RA0 ~ RA12, Column address: CA0 ~ CA7 (x32): CA0 ~ CA8 (x16)
RAS
Row Address Strobe
Latches row addresses on the rising edge of the CLK with RAS low.
Enables row access
CAS
Column Address Strobe
Latches column addresses on the rising edge of the CLK with CAS low.
Enables column access.
MR
Mode Register Set
Enables mode register set with MR low. (Simultaneously CS,RAS and CAS are low)
Q0 ~ Q31
Data Output
VDD/VSS
Power Supply/Ground
VDDQ/VSSQ
Data Output Power/
Ground
Power and ground for the input buffers and the core logic.
Power and ground for the output buffers.
WORD
x32/x16 Mode Selection
Double word mode/word mode, depending on polarity of WORD pin.
Should be set before CAS enabling.
DQM
Data-out Masking
It works similar to OE during read operation.
N.C
No Connection
This pin is recommended to be left No Connection on the device.
Note1. VDD and VDDQ is same voltage.