K3S7V2000M-TC Datasheet, PDF (16/27 Pages) Samsung semiconductor – 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM

K3S7V2000M-TC
Synch. MROM
Read Interrupted by Precharge Command & Burst Read Stop Cycle @Burst Length=8
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CLK
CKE
HIGH
CS
RAS
CAS
ADDR
RAa
CL=2
Data
CL=3
CAa
CAb
Note1
Qa0 Qa1 Qa2 Qa3 Qa4
Note1
Qb0 Qb1 Qb2 Qb3 Qb4 Qb5
Note2
Qa0 Qa1 Qa2 Qa3 Qa4
Note2
Qb0 Qb1 Qb2 Qb3 Qb4 Qb5
MR
DQM
Row Active
Read
*Note1, 2
Burst Stop
Read
Precharge
: Don't Care
*Note :
1. The burst stop command is valid at every page burst length.
The data bus goes to High-Z after the CAS latency from the burst stop command is issued.
2. The interval between read command (column address presented) and burst stop command is 1 cycle(min).