K3S7V2000M-TC Datasheet, PDF (23/27 Pages) Samsung semiconductor – 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM

K3S7V2000M-TC
Synch. MROM
4. Read cycle depending on tRC
@ RL = 2, CL = 5, BL = 4 ; 100MHz
CLK
CMD ACT
CASE I )
CASE II )
CASE III )
tRC(min)=6
RDa
ACT
tCC=10ns
RDb ^{CASE I )}
ACT
RDb ^{CASE II )}
ACT
RDb ^{CASE III )}
High-Z
Qa0 Qa1 Qa2 Qa3
Qa0 Qa1 Qa2 Qa3
Qb0 Qb1 Qb2 Qb3
Qb0 Qb1 Qb2 Qb3
Qb0 Qb1 Qb2 Qb3
@ RL = 2, CL = 5, BL = 4 ; 83MHz
CLK
CMD ACT
CASE I )
CASE II )
CASE III )
tRC(min)=6
RDa
ACT
tCC=12ns
RDb ^{CASE I )}
ACT
RDb ^{CASE II )}
ACT
RDb ^{CASE III )}
High-Z
Qa0 Qa1 Qa2 Qa3
Qa0 Qa1 Qa2 Qa3
Qb0 Qb1 Qb2 Qb3
Qb0 Qb1 Qb2 Qb3
Qb0 Qb1 Qb2 Qb3
@ RL = 1, CL = 4, BL = 4 ; 66MHz
CLK
tRC(min)=4
CMD ACT RDa
ACT RDb ^{CASE I )}
ACT RDb ^{CASE II )}
tCC=15ns
ACT RDb ^{CASE III )}
CASE I )
High-Z
Qb0 Qb1 Qb2 Qb3
CASE II )
Qa0 Qa1 Qa2 Qa3 Qb0 Qb1 Qb2 Qb3 (Gapless Operation)
CASE III )
Qa0 Qa1 Qa2 Qa3
Qb0 Qb1 Qb2 Qb3