R-IN32M3_15 Datasheet, PDF (93/105 Pages) Renesas Technology Corp – LSI for Industrial Ethernet

R-IN32M3 Series Data Sheet
4. Electrical Specifications
4.7.8
I2C interface
Parameter
Symbol Conditions
Normal mode
MIN MAX
High speed mode
Unit
MIN
MAX
SCL clock frequency
tSCL
CL = 30pF
0
100
0
400 kHz
Bus-free time between the stop condition tBUF
and start condition
4.7
-
1.3
-
μs
Hold time
tHSTA
4.0
-
0.6
-
μs
SCL clock low-level width
tSCLL
4.7
-
1.3
-
μs
SCL clock high-level width
tSCLH
4.0
-
0.6
-
μs
Setup time for the start and restart
conditions
tSSTA
4.7
-
0.6
-
μs
Data hold time For a CBUS compatible tHDAT
master
5.0
-
-
-
μs
For an IIC bus
0
-
0
0.9
μs
Data setup time
tSDAT
250
-
100
-
ns
SDA and SCL signal rise time
tSCLR
-
1000 20 + 0.1Cb
300
ns
SDA and SCL signal fall time
tSCLF
-
300 20 + 0.1Cb
300
ns
Stop condition setup time
tSSTO
4.0
-
0.6
-
μs
Pules width of spike suppressed by input tSP
filter
-
-
0
50
ns
Capacitance load of each bus line
Cb
-
-
400
-
400
pF
SCLn (i/o)
< t_SCL>
<
t_SCLL>
< t_SCLH>
< tHSTA>
< tHDAT>
< tSDAT>
SDAn
(output)
<
t_BUF>
Stop
Start
condition condition
Remark : n = 0, 1.
The statement of t_SCLR, and t_SCLF is
omitted.
< t_SSTA>
< t_HSTA>
Restart
condition
Figure 4.16 I2C access timing diagram
<
t_SP>
< t_SSTO>
Stop
condition
R18DS0008EJ0204
Dec 25, 2014
Page 93 of 100