R-IN32M3_15 Datasheet, PDF (90/105 Pages) Renesas Technology Corp – LSI for Industrial Ethernet

R-IN32M3 Series Data Sheet
4. Electrical Specifications
4.7.6
External DMA interface
Parameter
DMAREQZ [1:0], RTDMAREQZ
input setup time
DMAREQZ [1:0], RTDMAREQZ
input hold time 1
DMAREQZ [1:0], REDMAREQZ
input hold time 2
DMAACKZ [1:0], RTDMACKZ
output delay time
DMAACKZ [1:0], RTDMAACKZ
output high level width
DMATCZ [1:0], RTDMATCZ
output delay time
Symbol Conditions
MIN
tSKDR
-
7.0
MAX
Unit
-
ns
tHKDR1
tHKDR2
tDKDA
tWDAH
-
Until DMAACKZ↓
RTDMAACKZ↓
-
-
CL = 30pF
2.0
-
ns
tBUSCLK ^Note1 × m ^Note2 -
ns
7.0
10.0
ns
-
tBUSCLK ^Note1 × m ^Note2 - 8 tBUSCLK ^Note1 × m ^Note2 + 8
ns
tDKTC
CL = 30pF
2.0
10.0
ns
Note1. t_BUSCLK is one cycle (10 ns) of BUSCLK.
Note2. m = 1-31 (DMAIFC0, DMAIFC1, RTMDAIFC registers).
BUSCLK (output)
DMAREQZn,
RTDMAREQZ
(input)
< t_SKDR >
DMAACKZn,
RTDMAACKZ
(output)
DMATCZn,
RTDMATCZ
(output)
Remark : n = 0,
1
< t_HKDR1 >
< t_HKDR2 >
< t_DKDA >
< t_WDAH >
< tDKTC >
Figure 4.13External DMA access timing diagram
R18DS0008EJ0204
Dec 25, 2014
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