R-IN32M3_15 Datasheet, PDF (82/105 Pages) Renesas Technology Corp – LSI for Industrial Ethernet

R-IN32M3 Series Data Sheet
(b) Write timing
4. Electrical Specifications
BUSCLK (output)
CSZ0-CSZ3
(output)
WRSTBZ
(output)
< t_DKA >
< t_DKWR
>
< t_DKWR
>
< t_DKA >
RDZ (output)
< t_HKOD >
D0-D15 (i/o)
WAITZ (input)
< tSKW >
< t_DKBS > ^{< tDKBS >}
< t_SKID >
< tHKW >
ADVZ (input)
< t_DKOD >
Figure 4.7 Memory controller write timing diagram (synchronous memory)
Remark. Above timing is for the case where “t_ceoe” is 2 and “t_rc” is 4.
R18DS0008EJ0204
Dec 25, 2014
Page 82 of 100